The present invention relates to a pattern formation method for forming a resist pattern on a semiconductor substrate in a manufacturing process of a semiconductor device.
In accordance with development of higher integration of semiconductor integrated circuits, there is a demand for further refinement of the semiconductor integrated circuits, and exposing light having a much shorter wavelength is desired in lithography technique. Specifically, as exposing light used in pattern exposure during the formation of a resist pattern having a line width smaller than 0.15 .mu.m, ArF excimer laser is used because its wavelength is sufficiently short for attaining high resolution.
The ArF excimer laser, however, has a problem that the depth of focus is small because of its short wavelength.
Therefore, as a pattern formation method using the lithography technique, a silylation process, in which a resist pattern is formed by conducting etching on a resist film with a silylated layer formed on the resist film used as a mask, has been proposed.
A conventional pattern formation method using the silylation process will now be described with reference to FIGS. 7(a) through 7(d).
First, after a resist film 2 with a thickness of 0.7 .mu.m is formed by coating a semiconductor substrate 1 with a resist material (such as SAL-601; manufactured by Shipley Far East Company) as is shown in FIG. 7(a), pattern exposure is conducted, as is shown in FIG. 7(b), by irradiating the resist film 2 with ArF excimer laser 4 through a mask 3 having a desired pattern shape.
In an exposed portion 2a of the resist film 2, crosslinkage is caused in the resist material through the exposure. An example of the crosslinkage caused when the resist material does not include a cross linking agent is represented by the following chemical formula 1, and an example of the crosslinkage caused when the resist material includes a cross linking agent is represented by the following chemical formula 2: ##STR1##
The aforementioned resist material SAL-601 manufactured by Shipley Far East Company includes a cross linking agent.
Next, the semiconductor substrate 1 is heated to a temperature of approximately 110.degree. C., and a vapor treatment for supplying dimethylsilyl dimethylamine (DMSDMA) 5 having been put in a gas phase through bubbling as a silylation agent onto the surface of the resist film 2 for approximately 90 seconds is conducted as is shown in FIG. 7(c). Through this vapor treatment, silylation between OH groups of a resin included in the resist film 2 and silyl groups of the DMSDMA 5 is caused in an unexposed portion 2b of the resist film 2 as is represented by the following chemical formula 3, thereby forming a silylated layer 6 on the surface. On the other hand, in the exposed portion 2a of the resist film 2, the silylated layer 6 is not formed because the molecular weight of the resin included in the resist material has been so increased through the crosslinkage that the silylation between the OH groups and the silyl groups is scarcely caused. In this case, a by-product generated through the silylation is evaporated. In the following chemical formula 3, R indicates the resin included in the resist material: ##STR2##
Next, the exposed portion 2a of the resist film 2 is removed through dry etching of the resist film 2 by using the silylated layer 6 as a mask as is shown in FIG. 7(d). Thus, a resist pattern 7 is formed in the unexposed portion 2b of the resist film 2.
Since this pattern formation method using the silylation process adopts the dry etching conducted by using the silylated layer formed on the surface of the resist film as a mask, the method is not affected by reflected light from the semiconductor substrate. Therefore, the resultant resist pattern can attain a high aspect ratio.
However, according to this method, the pattern width of the silylated layer 6 is smaller than the width of the unexposed portion 2b of the resist film 2 as is shown in FIG. 7(c). In addition, the thickness of the silylated layer 6 is not sufficiently large and is further smaller toward the edges of the pattern. Accordingly, when the etching is conducted on the resist film 2 by using this silylated layer 6 as a mask, the edges of the pattern of the silylated layer 6 are damaged through the etching as is shown in FIG. 7(d). Thus, this method has a problem that the pattern width of the resist pattern 7 becomes further smaller than the width of the unexposed portion 2b of the resist film 2.
This problem also occurs when a resist pattern is formed as follows: A silylation agent is supplied onto the surface of a resist film having been subjected to the pattern exposure, so as to form a silylated layer on the surface of an exposed portion of the resist film exposed through the pattern exposure. Then, the resist film is etched by using the silylated layer as a mask, thereby removing an unexposed portion of the resist film.
When the pattern width of the silylated layer is small and thin as described above, the silylated layer cannot sufficiently exhibit a masking function, resulting in degrading the pattern shape of the resultant resist pattern. As a result, a failure can be caused in the semiconductor device in subsequent processes. Thus, the yield of the semiconductor device can be disadvantageously decreased.